Pentium
By 1993, Windows was standard, and users expected a lot more from PCs in performance and features. Increasing software sophistication led to increasing memory usage and hard disk drive requirements. The market was ready for a major upgrade in CPUs, and Intel once again addressed that need. The new Pentium processor signaled a radical redesign of both the CPU and naming conventions.
With their CPUs identified by numbers, Intel faced a business problem: numbers cannot be trademarked. The company's strategy was to substitute a trademarkable name, "Pentium" for their upcoming chips that would otherwise have been named "586." The word is based on the Latin word for the number five, and this chip would have been the 80586. The original design has been revamped several times since 1993, and now there are Pentium IIs and IIIs. Like the older PC CPUs, the Pentium has spawned its share of clones, leading to entry-level PCs priced under $400.
The Pentium (Series I) offers the following features:
- Speeds of 60 to over 200 MHz.
- 32-bit address bus and 32-bit registers.
- 64-bit data path to improve the speed of data transfers.
- Dual pipeline, 32-bit data bus that allows the chip to process two separate lines of code simultaneously.
- At least 8-KB write-back cache for data and an 8-KB write-through cache for programs.
- "Branch prediction"-in which the program cache attempts to anticipate branching within the code. The CPU stores a few lines of code from each branch so that when the program reaches the branch, the Pentium already has the code stored within the cache.
The following table lists the first generation of Pentium and Pentium-compatible chips.
| Chip | Speed (MHz) | Register Width | External Data Bus | Address Bus | Internal Cache |
|---|---|---|---|---|---|
| Intel Pentium | 60, 66 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| Intel Pentium | 75 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| Intel Pentium | 90, 100 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| Intel Pentium | 120, 130 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| Intel Pentium | 150, 166 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| Intel Pentium | 180, 200 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| CYRIX 6x86(P-rating) | 100, 120, 133, 200 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
| AMD K5 (P-rating) | 75, 90 | 32-bit | 64-bit | 32-bit | 8 KB W/B and 8 KB W/T |
Mass-producing reliable P66 Pentiums proved difficult, and many were rejected during quality control. The faulty chips were stable at clock speeds of 60 MHz, so Intel sold them as the P60. Some users change their P60 processor clock speed to 66 MHz by changing a jumper on the motherboard. This might work, but computer performance and longevity can be unpredictable.
Intel continued to use the 0.8-micron manufacturing process (the ability to draw lines as fine as 1/1000 of a millimeter on the die, about 16,000 lines per inch), begun with the 486, to fit 3.1 million transistors on the Pentium chip. The P66 used considerable power and consequently generated a large amount of heat. Operating a reliable heat sink and fan became critical with the advent of the Pentium.
The Pentium 75 was released in 1994. These chips were made using a 0.6-micron manufacturing process (approximately 21,000 lines and spaces per inch) and, as a result, they required considerably less power, despite an additional 200,000 transistors. Intel was able to change the power supply from 5 volts to 3.3 volts (the DX4 also had a reduced power supply), which reduced by nearly one half the amount of heat produced. The P90 and P100 processors were released at this time. These processors ran internally at 1.5 times the external speed (60 or 66 MHz, which was the fastest system board). A P75 processor was also released for use in lower specification machines and laptop computers.
Superscalar Technology
The main components of a processor-registers, decoders, and ALUs (arithmetic/ logic units)-are collectively known as the instruction pipeline. To carry out a single instruction, a processor must:
- Read the instruction.
- Decode the instruction.
- Fetch operands (for math functions).
- Execute the instruction.
- Write back the results.
Early processors carried out these steps one at a time. Combining these steps into a single clock cycle, a process known as pipelining, thereby increases the speed of processing. Superscalar technology allows the Pentium to have two instruction pipelines-called U and V. The U pipeline can execute the full range of Pentium instructions, while the V pipeline can execute a limited number. When possible, the Pentium processor breaks up a program into discrete tasks that are then shared between the pipelines, thus allowing the Pentium to execute two simple instructions simultaneously. Software must be specifically written to take advantage of this innovative feature, which is known as multithreading.
Pentium On-Board Cache
The original Pentium series came with two 8-KB caches-one for data and one for program code, compared with the single 8-KB cache on the 486 (16 KB on the DX4). As described with the 486 chip, the cache uses a technique called "branch prediction" to improve its ability to guess what data or program code will be required next by the processor.
Intel's Competitors
Competitors have moved away from simply making clones of the Intel processors. They are currently designing their own processors with unique features:
- NextGen Nx586
- AMD AmSx86
- Cyrix 6x86
- IBM 6x86
RISC (Reduced Instruction Set Computing)
Until recently, all the Intel processors had been based on a CISC (complex instruction set computing) architecture. Processors based on RISC (reduced instruction set computing) have been used in high-powered machines since the mid-1980s. Intel has produced its own version of a RISC-based processor that uses a much smaller and simpler set of instructions, greatly enhancing the speed of the processor.
Pentium Pro
Intel made CPU selection even more complex with the introduction of the Pentium Pro, offering varied features, in different models, of the Pentium design. This processor was aimed at a 32-bit server and workstation-level applications such as computer-aided design (CAD), mechanical engineering, and advanced scientific computation. The Pentium Pro was packaged with a second speed-enhancing cache memory chip, and boasted 5.5 million transistors. First available in November, 1995, it incorporated an internal RISC architecture with a CISC-RISC translator, three-way superscalar execution, and dynamic execution. While compatible with all the previous software for the Intel line, the Pentium Pro is optimized to run 32-bit software. Its pin structure and mount differ from the basic Pentium, requiring a special ZIF socket. Some motherboards have sockets for both Pentium and Pentium Pro, but most machines use motherboards designed for one or the other. The package was a 2.46-inch by 2.66-inch 387-pin PGA configuration to house a Pentium Pro processor core and an on-board L2 cache. Although mounted on one PGA device, they are two ICs. A single, gold-plated copper/tungsten heat spreader gives them the appearance of a single chip.
The main CPU and 16-KB first-level (L1) cache consist of 5.5 million transistors; the second chip is a 256- or 512-KB second-level (L2) cache with 15 million transistors. A 133-MHz Pentium Pro processes data about twice as fast as a 100-MHz Pentium.
One reason for the better performance is a technology called dynamic execution. Before processing, the data flow is analyzed and sequenced for optimal execution. Then the system looks ahead in the program process and predicts where the next branch or group of instructions can be found in memory, then processes up to five instructions before they are needed. By using a technique known as data-flow analysis, the Pentium Pro can determine dependencies between data items so they can be processed as soon as their inputs are available, regardless of the program's order.
Pentium MMX
Soon, more choices were on the way. About the time the 166-MHz Pentiums shipped, Intel introduced MMX (multimedia extension) technology, designed to enhance performance of data-hungry applications like graphics and games. With larger data and code caches, Pentiums with MMX technology can run non-MMX-enhanced software approximately 10 to 20 percent faster than a non-MMX CPU with the same clock speed.
To reap the full benefits of the new processor, MMX-enhanced software makes use of 57 special multimedia instructions. These new MMX operators use a technology called single instruction multiple data (SIMD) stream processing. SIMD allows different processing elements to perform the same operations on different data-a central controller broadcasts the instruction to all processing elements in the same way that a drill sergeant would tell a whole platoon to "about face," rather than instruct each soldier individually.
The MMX chips also take advantage of dynamic branch prediction using the branch target buffer (BTB) to predict the most likely set of instructions to be executed.
The MMX Pentium processor is also more compatible with older 16-bit software than is the Pentium Pro; consequently, it soon doomed the Pro to the backwaters of PC computing. All later versions of the Pentium have incorporated some variation of MMX and improved on it. The original Pentium desktop line ended with the 233-MHz MMX release in June of 1997.
Pentium II
By 1997, multimedia was becoming mainstream, and high performance in a graphical user environment was critical to CPU market success. Intel upped the ante with its competitors in 1997 with a radical redesign. The first 233-MHz, 7.5 million-transistor, Pentium II processor incorporated MMX technology and was packaged with a high-speed cache memory chip. Intel released Pentium II versions operating at speeds of up to 450 MHz.
The Pentium II incorporated the features of its older designs and added a number of enhancements. Among these are:
- Multiple Branch Prediction: predicts program execution through several branches, accelerating the flow of work to the processor.
- Data-flow Analysis: Creates an optimized, reordered schedule of instructions by analyzing data dependencies between instructions.
- Speculative Execution: Carries out instructions speculatively and, based on this optimized schedule, ensures that the processor's superscalar execution units remain busy, boosting overall performance.
- Single-edge connector (SEC) cartridge packaging: Developed by Intel, this enables high-volume availability and offers improved handling protection and a common form factor for future high-performance processors. This development resolved problems caused when pins were accidentally bent during installation or removal of CPUs.
- High-performance Dual Independent Bus (DIB) architecture (system bus and cache bus).
- System bus that supports multiple outstanding transactions to increase bandwidth availability. It also provides "glueless" support for up to two processors. This enables low-cost, two-way symmetric multiprocessing, providing a significant performance boost for multitasking operating systems and multithreaded applications. Many inexpensive motherboards offer two Slot 1 sockets, making it easy to build a dual processor system for use with operating systems like Windows NT or 2000.
- 512-KB unified, nonblocking, L2 cache: Improves performance by reducing average memory access time and providing fast access to recently used instructions and data. Performance is enhanced through a dedicated 64-bit cache bus. The speed of the L2 cache scales with the processor core frequency. This processor also incorporates separate 16-KB, L1 caches: one for instructions and one for data.
- Models available in 450, 400, and 350 MHz: Support memory caches for up to 4 GB of addressable memory space.
- Error correction coding (ECC) functionality on the L2 cache bus: for applications in which data intensity and reliability are essential.
- Pipelined floating-point unit (FPU): supports the 32-bit and 64-bit formats specified in IEEE (Institute of Electrical and Electronics Engineers) standard 754, as well as an 80-bit format.
- Parity-protected address/request and response system bus signals, with a retry mechanism for high data integrity and reliability.
Variations on a Theme: The Intel Celeron CPUs
As it had in the past, Intel faced competitors who sold CPUs with similar performance at lower prices. Most high-priced desktop computers and servers were sold with a Pentium of one sort or another, but home and entry-level were another matter. Enter a variation of the SX concept-the Celeron.
Models available in 500, 466, 433, 400, 366, and 333 MHz have expanded Intel processing into the market for computers selling under $1,200.
All the Intel Celeron processors are available in PGA packages. The versions operating at 433, 400, 366, 333, and 300A MHz are also available in single-edge processor packages.
Key features include:
- MMX media enhancement technology.
- Dynamic Execution Technology.
- A 32-KB (16-KB/16-KB) nonblocking, L1 cache for fast access to heavily used data.
- Celerons operating at 500, 466, 433, 400, 366 and 333 MHz include integrated 128-KB L2 cache.
- All Celeron processors use the Intel P6 microarchitecture's multitransaction system bus at 66 MHz. Processors at 500, 466, 433, 400, 366 and 333 MHz use the Intel P6 microarchitecture's multitransaction system bus with the addition of the L2 cache interface.
- Like the Pentium family, the Celerons offer multiple branch prediction, data-flow analysis, and speculative execution.

Figure 4.12 Intel Pentium II in SEC Package
Xenon, the Premium Pentium
Intel has labeled a new CPU brand to denote high-end server and high-performance desktop use. First introduced in June, 1998, the Xenon line commands a premium price and offers extra performance-enhancing technology. The Pentium II models incorporate 7.5 million transistors, clock speeds to 450 MHz, bus speeds of 100 MHz, full-speed L2 caches in varying sizes up to 2 MB, new multiprocessing capabilities, and compatibility with previous Intel microprocessor generations. All models use the SEC package.
Pentium III Processor
The Intel Pentium III processor is the newest member of the P6 family. With 28 million transistors, speeds from 500 to 733 MHz, and system bus speeds of 100 to 133 MHz, they mark a significant jump in PC CPU technology. They employ the same dynamic execution microarchitecture as the PII-a combination of multiple branch prediction, data-flow analysis, and speculative execution. This provides improved performance over older Pentium designs, while maintaining binary compatibility with all previous Intel processors. The Pentium III processor, shown in Figure 4.13, also incorporates MMX technology, plus streaming SIMD extensions for enhanced floating-point and 3-D application performance. It also utilizes multiple low-power states, such as AutoHALT, Stop-Grant, Sleep, and Deep Sleep to conserve power during idle times.

Figure 4.13 The Intel Pentium III Processor
Intel offers a Xenon version of the Pentium III processor at 550 MHz, aimed at high-performance workstations and servers.
Motorola
Motorola has been the mainstay CPU for Apple computers. The 68000 processor was introduced in 1979 as a 32-bit chip with a 16-bit data path. At that time, the 68000 outperformed the Intel 8086. In 1982, the 68010 arrived, adding virtual memory support and a cache capable of holding three instructions.
1984 saw the advent of the Macintosh II-series computer, which used the 68020 processor. It was the first full 32-bit chip, with a 32-bit data path, math coprocessor, and the ability to access up to 4 GB of RAM. Introduced in the same year as Intel's 80286 processor, the Motorola ran faster. However, it lacked the market share and third-party support to gain real marketplace momentum. PC clones offered more programs and at lower cost than the Apple offerings.
The 68030 chip, introduced in 1987, provided increased data and instruction speed. This was comparable to the 80386 chip. The 68040 processor was introduced (in the Macintosh Quadra) as a competitor to the 80486. It has internal caches for data and program code.
The Power PC processor was developed jointly by IBM, Motorola, and Apple. The name stands for performance optimization with enhanced RISC. The chips in this family of processors are suitable for machines ranging from laptop computers to high-powered network servers. It can run MS-DOS software without using emulation.